Memory is one of the foundational technologies behind every major compute transition, and right now it is more visible than it has been in years. As AI infrastructure expands across training, inference, and large scale cloud deployments, demand for high performance DRAM and storage has moved sharply up the industry agenda. Whether that means HBM feeding the latest accelerators, LPDDR finding a new role in data center architectures, or fast SSDs supporting ever larger models and data pipelines, memory is no longer a commodity part of the bill of materials.
The shift has changed the economics of memory in a very visible way. The industry has spent decades thinking in cycles, with familiar waves of overcapacity and correction, but the current environment feels different. AI has pushed memory further up the value stack, turning it from something many treated as a commodity into one of the key battlegrounds in the buildout of next-generation infrastructure. The biggest companies in the world are now competing not just for compute, but for access to the fastest and densest memory subsystems, and for the storage needed to make those systems useful at scale. As pointed out in this interview, what we are seeing now is not demand appearing from nowhere, but years of expanding use cases across servers, smartphones, automotive, and cloud – finally being supercharged by AI.
Joining me for this discussion is Praveen Vaidyanathan, VP and GM of Cloud Memory Products in Micron’s Cloud Memory Business Unit. His remit covers the memory technologies now sitting at the heart of modern data center design, from HBM and LPDDR based server solutions through to the storage products increasingly used alongside accelerated compute. In this conversation, we talk about whether this really is just another memory cycle, what changed as AI demand accelerated, how Micron is thinking about HBM4, custom memory, SOCAMM, LPDDR6, and PCIe Gen 6 SSDs, and what it means to plan capacity years in advance in a market where demand can suddenly look very different in the space of a single quarter.
The following is a tidied up transcription of the interview.
Ian Cutress: So the first question is: is this a cycle? This is the memory industry, We’re so used to ups and downs. What makes this one different?
Praveen Vaidyanathan: I think whether it’s a cycle or not – if you look at history, [then] yes. However, whether something is a cycle or not, we will know three years from now. Do I really know today? Probably not. But I think what is happening with the current scenario is really the underlying fundamentals that are driving this cycle in terms of the demand drivers. Where do people need memory? If I look at going back to the 80s and 90s where people used to think of memory as a PC component, that’s where it all started.
It was a KB number; now it’s a very different number these days. That’s where it started, but it then progressed into every single application. You talked about consumer; the advent of the smartphone changed what consumer looks like. So that provided another outlet and then it walked into automotive. Automotive applications today require memory, and then servers came along. So the presence of memory across the entire user space has proliferated so much and I think this has been building over time. And now the super cycle is that history that has built up, and now AI has come upon and that has catapulted and surged the demand for memory and application. So I think it’s fundamental to how systems are architected today and we are looking forward to working in this environment.
Ian Cutress: You say it’s built up over time, but if I look at recent history, the last six months, I think Q4 in ‘25 people suddenly went, “Wait, what? It’s not a commodity anymore”. What changed that quarter?
Praveen Vaidyanathan: We think there are maybe a couple of things going on. I think as AI came on – let’s say 2022 time frame, when the whiff of generative AI happened with ChatGPT – and people started using that more, there was a lot of investment in core AI infrastructure which was very much accelerated compute. And as people invested in that, I think there were two things that happened: the continuous growth in frontier models and the cost of tokens coming down has increased the usage of AI applications.
Ian Cutress: Jevon’s paradox sort of thing – make it cheaper and people will use it.
Praveen Vaidyanathan: Exactly. I think that is happening, and could you predict this? Not when models are evolving on a three-month cycle time. You don’t really predict this. So that has resulted in a surge in demand. Along with accelerator compute, I think there is also a lot of supporting compute around it that people did not invest in long enough and suddenly that investment became necessary. So the two put together kind of came together at the same time. But in this industry, I don’t know why we should be surprised about things happening suddenly. How many times has that happened? And then we all look back and say, “Of course, it’s obvious,”.
Ian Cutress: This is why companies like Micron and your competitors are investing every generation in new technology. We track where the tools are being sold for the latest generation process nodes and the topic of the day right now is this transition from HBM3 to HBM4, and we’re seeing a different number of constraints around HBM4. Can you explain how they look at Micron?
Praveen Vaidyanathan: So we actually just announced at GTC that we are in volume production with our HBM4. We hit volume production with HBM3E last year and now we are here with the HBM4. HBM4 does two things. One is it allows you to improve the bandwidth of the memory attached to your GPU. The second is it continues to improve the power efficiency curve because you want more bandwidth, you want more performance, but you are limited by the power envelope. So it does that, but every generation of HBM also has more manufacturing complexities. It takes longer cycle times to produce. So you have to innovate not just on the product cycle and product capabilities; you have to innovate on the manufacturing also. As soon as you have this product, everybody wants it and they want to go push the product in the market. So innovating on the manufacturing cycle times and manufacturing efficiency is another thing that we have to keep working on.
Ian Cutress: One of the things that always strikes me is that HBM and the JEDEC standards almost seem to be misaligned a little bit, as in JEDEC might be a bit too slow and the demand for HBM might be a little fast. That’s where we’re getting situations where you’ve got a big partner like Nvidia asking for faster than JEDEC. So what extra has to go in to essentially provide that product line for such a big customer?
Praveen Vaidyanathan: I think it’s true for them and a few other customers also. I think what you have to understand is it always starts with “what do the customers want?”. So we talk to them ahead of time to try to figure out what they want. But we do also have to think a little bit ahead and think about what does the industry need. If bandwidth is the key capability of HBM, then that’s what you’ve got to shoot past the puck a little bit to be ready with something.
JEDEC is interesting – it doesn’t limit what you can do. It just provides a common platform. It makes it a commodity, but you can still innovate. For example, HBM4 still meets all JEDEC requirements, but it’s faster. Because we all said, “We’re going to design faster”. Our customers said “we want to go there”, so we went there. So, we do think about how we operate within both environments because honestly, having a standardization helps adoption. Everybody can take it and use it, so that helps. But also, the commodity piece of it is not great, which is why custom HBM has come on, where some people want a little bit more than that and they are willing to work with us on that.
Ian Cutress: In terms of custom, JEDEC defines a specific size of HBM and how many stacks you can go up to based on bonding and other specifications. Are you seeing customers who want different XY dimensions or different heights, beyond standard stuff like that?
Praveen Vaidyanathan: It could go there, who knows. But that’s not where the current trend is. The current trend is you want to keep a few things constant, but within that, what more can you do? We think it’s going to be more functions and features that you can incorporate that are not part of your standard JEDEC offering.
This is why we have the logic base dies. That allows you to do more with it once you go to an advanced logic-based die you can do more with it.
Ian Cutress: You seem to be doing something a little different on your base die because you’re using an internal 20nm process rather than a TSMC N3 or Samsung Foundry SF4. What benefits does that bring you?
Praveen Vaidyanathan: I think that’s a great question, Ian. I don’t think we’ve said 20, it’s just a general internal logic process for us, but it starts off from the very beginning from a design methodology perspective. When we did our HBM3E, we kind of anticipated that as you scale this technology, innovating on the DRAM stack is going to be most important because that’s what – as you go from 8-Hi to 12-Hi to 16-Hi – you have one base die, but you have lots of DRAM on there. So if you want to think about performance and power optimization, innovate on the DRAM, get to the best DRAM you can, and then bolt on the best logic die that you can get.
Our HBM3E was actually 30% more power efficient than any other HBM3E out there. So we had a little bit of an advantage over that. And if you go to HBM4, the same advantage: we were able to get another 20% improvement before HBM3E, so we had less to gain from going to an advanced logic node on the base die and we had all our innovations on the top die. We evaluated everything. We said, “Hey, we want to be paranoid that we’re missing something,”.
I think we all grew up as engineers. It’s hard to get away from that. That mindset really helps: have the paranoia, go evaluate everything. We came back to the conclusion that we’ll be able to meet the speeds and performance that the market requires with our own logic. And this also reduces our risk because now we are all in-house. We don’t have to have an external dependence. We have a mature DRAM technology that is the same between HBM3E and HBM4. So less change, less risk, and faster ability to ramp. That was the decision that we made over a very long life cycle in probably three minutes, but those were the key tenets of that.
Ian Cutress: How integrated are you with the packaging firms? Because a lot of this HBM is in a CoWoS or a cube type formation. I assume you’ve got to make sure it’s all compatible with them.
Praveen Vaidyanathan: Absolutely. We have a packaging team that is working ahead of time; in fact, a significant portion of our packaging team is stationed in Taiwan, which is where all the action is. So we work very closely with both our internal manufacturing teams and our external manufacturing partners to deliver these things. It’s a co-design; packaging design starts at the same time as silicon design. They have to be fully integrated. Some of the things I talked about, like the power advantage we had, we actually had some packaging techniques incorporated in there that help with lower power consumption.
Ian Cutress: Like integrated deep trench capacitors and that sort of thing?
Praveen Vaidyanathan: We don’t do integrated deep trench capacitors, but it’s more about TSVs and pitches and how many metal pillars you have to conduct heat. You help design with packaging and the two come together. It gets more complex over time.
Ian Cutress: At GTC, Nvidia mentioned HBM3, HBM3E, HBM4, HBM4E, then HBM custom. I’ve already got people asking me: is that truly custom or is it still standards-based to a certain degree?
Praveen Vaidyanathan: I can’t speak for Nvidia of course, but we have publicly stated that we expect a parallel product line. There will always be a generic product line, but we will also have a custom product line for certain customers who are able to extract additional value. So I don’t think it’s an either-or answer; there are certain use cases that work really well with JEDEC and there are certain use cases that will require the custom HBM.
Ian Cutress: Because demand is so high, how do memory companies like yourself decide when to increase manufacturing capacity? These things don’t spin up overnight; it requires 20+ billion dollars and 3 or 4 years of effort. If you can predict then you can build, but if you can’t predict it becomes difficult.
Praveen Vaidyanathan: Broadly it’s part of our planning cycles. Let me give you some examples that illustrate the results of our planning. If you look at some of the announcements we’ve made on manufacturing in the US, that was made multiple years ahead. It happens to come in around this time, but it was made because we saw some geopolitical shifts and opportunities to manufacture in the US. But the other reason was based on a vision that said there is a need for capacity in the industry so we’re going to invest. It cannot be reactionary to every little change; it has to be based on a broader long-term industry outlook. In the last few weeks, we inaugurated an assembly facility in India, we recently broke ground on an HBM backend facility in Singapore, and we announced an expansion of our fab in Japan. Was this all a reaction to Q4 ‘25? That’s not possible; it is several things in progress that are coming together to drive the demand growth that we see.
Ian Cutress: It was last year when you guys announced $100b in US manufacturing investment over however many years. And that was even before Q4.
Praveen Vaidyanathan: Correct. We don’t have a crystal ball on everything. You have to invest based on your best understanding of the market, be closer to your customers, and then manage within that opportunity. But we do a lot of things on optimizing manufacturing using AI. Our ability to ramp new technologies has accelerated quite a bit because of the use of AI.
Ian Cutress: Pivoting to LPDDR, I know that’s going through a renaissance right now. Everybody wants LPDDR5X, but then we’ve got this new SOCAMM technology.
Praveen Vaidyanathan: Oh, do you want to see some?
Ian Cutress: This says 256GB!
Praveen Vaidyanathan: It’s a new capacity we just announced three weeks back. It’s the highest capacity low power DRAM module ever built: 256GB LPDDR5X-7500.
Ian Cutress: At GTC we saw the Vera CPU blade. How many SOCAMM modules did that have?
Praveen Vaidyanathan: It’s eight per CPU. So per CPU, you could get to up to 2TB. And if you have eight of them, then you get to 16TB of DRAM.
Ian Cutress: In this workload environment, some are demanding massive amounts of capacity and others are asking for faster memory. How do you approach that?
Praveen Vaidyanathan: Let’s take an example of SOCAMM. When we announced this, we actually have a portfolio that goes all the way from 48 Gb to 2 Tb, and it has speeds ranging from 7500 MT/s to 9600 MT/s. Somebody who doesn’t want all the capacity but wants maximum bandwidth would get a 48 Gb 9600 MT/s. Somebody who wants capacity would go for this because they don’t value speed as much. LPDDR in the data center is only two or three years old for CPUs. It’s been in the mobile space for a long time. It’s been in Hopper and Blackwell architectures for some time, but it was always attached to the GPU. But now there’s a push for a CPU-only solution. With agentic AI growth, that broadens the portfolio you need. We’re okay with a single point solution for a single point application, but now we need a broader portfolio with multiple speeds. It’s a learning experience; we have a broad portfolio so that we can investigate every use case. Customers may try something and then change their mind.
Ian Cutress: In the AI space where people are selling rack scale systems, are they mostly after capacity?
Praveen Vaidyanathan: I think it’s two things. If I think about a GPU-CPU configuration, you’d rely on the HBM for bandwidth. You want that to be as fast as you can, but you can’t put everything on the HBM. So, you need to offload, the KV cache and all that fun stuff. That’s where capacity comes in. You want to make sure the memory bandwidth is not slower than your interconnect bandwidth. As long as you get that, capacity is king. So that is a minimum requirement; beyond that you want capacity. Now, if you go to CPU only, I think everybody wants everything.
Ian Cutress: We’re starting to hear the first cues of LPDDR6 coming in. I think production is maybe sometime in 2027. What does LPDDR6 bring to the table?
Praveen Vaidyanathan: When LPDDR5 was designed, it wasn’t designed for the data center; that was an afterthought. Nvidia wanted to do it, so we worked with them to figure out how we can build this for the data center. We actually retrofitted some features in there for RAS and monitoring. With LPDDR6, you can do that from the start. It’s designed for the data center.
Ian Cutress: So we should consider LPDDR6 as a fundamental rearchitecture of the memory?
Praveen Vaidyanathan: It is architected for traditional consumer applications but also for the data center. We had an opportunity to think ahead and put in capabilities that will help data center adoption. Also, SOCAMM started as a proprietary solution, but now SOCAMM2 is an industry standard solution, which helps adoption. We think LPDDR6 will go the same way.
Ian Cutress: Part of the idea of SOCAMM is that you now have modular LPDDR. But how often are you seeing partners replace the SOCAMM? Whenever I see it, it’s in a liquid-cooled system. If you wanted to change it, you’d have to get into the guts of the system.
Praveen Vaidyanathan: This is just going to the market now, so we haven’t had experience with that. Most solutions, whether you use a capability or not, having the capability provides optionality for customers. It gets more complicated with tray-level systems, and servicing them is a different problem our customers are dealing with. But having the option tells them that they do not have to scrap an expensive tray because of one chip.
Ian Cutress: Could there be a consumer GPU with SOCAMM style memory in the future?
Praveen Vaidyanathan: I think so. There’s something called LPCAMM2 that was built for PCs and notebooks. There’s nothing stopping this module from being adopted in other solutions; it’s all about designing it into the space. But they do design a lot of down-memory components to get around the “I don’t need all this”.
Ian Cutress: There are motions about whether GPU vendors sell the memory with the ASIC or whether they want it to be flexible with different SKUs.
Praveen Vaidyanathan: The nice thing about this is this form factor doesn’t change with capacity or speed.
Ian Cutress: Do you have to do anything special about power?
Praveen Vaidyanathan: We have voltage regulators on here to do the conversions to come down to the levels you need for LP, because LP runs at lower voltages, so there is power management built into the module.
Ian Cutress: Can people design LPDDR5 and LPDDR6 in the same ASIC? Or are they too different?
Praveen Vaidyanathan: It can be done. You have to design the ASIC to manage both IOs and protocols. But there are fundamental differences. For example, the LPDDR5 IO was built to be 16-bit or 32-bit; LPDDR6 is a 24 or 48-bit IO. That’s a fundamental change.
Ian Cutress: Looking to the future, how far in front are you guys prepping for the next generations of memory? Companies talk about five to seven years of pathfinding; is it any different for a memory company?
Praveen Vaidyanathan: It’s very similar. There is technology pathfinding and then there’s design/architecture pathfinding. Technology pathfinding tends to be longer. So for us, that five to seven years probably applies even more simply because of the technology pathfinding we have to do. We talked about 12-Hi HBM4, but we also announced that we demonstrated a capability for 16-Hi HBM4 to prove technology capability so that when we need it, we are ready.
Ian Cutress: I’m waiting for HBM to have just as many layers as Flash! In the 80s we talked about KBs of capacity; now we’re talking about GBs. I’m sure in 10 years we’ll want hundreds of terabytes. What should people who follow Micron know about what 2026 looks like for you?
Praveen Vaidyanathan: You should see a full portfolio of memory and storage playing into every part of accelerated compute. We talked about HBM4, SOCAMM, and we also announced that we are first to market with our PCIe Gen 6 SSDs which are super valuable as KV caches expand. We want to be a product-first, technology-first company that is there with the right solutions ahead of time.
Ian Cutress: Do you have a lead customer you partner with for each new generation?
Praveen Vaidyanathan: Sometimes, and it’s a strategic choice. When we brought LP-DRAM into the data center, our partner was Nvidia. Sometimes its a smartphone vendor. Our customers are competing in the marketplace and we want to give them the maximum flexibility to win.
Ian Cutress: Are you all sold out for ‘26?
Praveen Vaidyanathan: I think we’ve publicly said that ‘26 is all accounted for.
Ian Cutress: Sounds like a good place to be in!
Praveen Vaidyanathan: To what we talked about earlier I realised you mentioned a $100b investment, but we actually talked about $200b being invested in the US. It continues to be a commitment to how we plan for capacity for ourselves and for the industry over the next decade.
